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FE310G: an open source RISC-V microcontroller – Interrupt System

FE310G: an open source RISC-V microcontroller – Interrupt System

In this second RISC-V article I talk about its interrupt and exception system and about SiFive‘s FE310G, the first commercial silicon implementation of a RISC-V. For more information on RISC-V instructions and registers, take a look at my previous article:

Fábio May 31, 2017 Microcontrollers, RISC-V No Comments Read more

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