FE310G: an open source RISC-V microcontroller – IDE
In my previous articles I presented the RISC-V CPU, its interrupt system and FE310G’s main features. Now it’s time to take a look at Freedom Studio, SiFive’s Eclipse-based …
Tag: FE310G
FE310G: an open source RISC-V microcontroller – Interrupt System
In this second RISC-V article I talk about its interrupt and exception system and about SiFive‘s FE310G, the first commercial silicon implementation of a RISC-V. For …
FE310G: an open source RISC-V microcontroller – Introduction
What about using a high-performance open hardware microcontroller? In this series I talk about SiFive’s FE310G, the first commercial implementation of a RISC-V core. For those who …
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